master init
This commit is contained in:
10198
Schematics/Interface-Module V1/gbr/Processor_Board-B_Cu.gbr
Normal file
10198
Schematics/Interface-Module V1/gbr/Processor_Board-B_Cu.gbr
Normal file
File diff suppressed because it is too large
Load Diff
302
Schematics/Interface-Module V1/gbr/Processor_Board-B_Mask.gbr
Normal file
302
Schematics/Interface-Module V1/gbr/Processor_Board-B_Mask.gbr
Normal file
@@ -0,0 +1,302 @@
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1,1,$1+$1,$4,$5*
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|
||||
%MOMM*%
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G01*
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||||
G04 APERTURE LIST*
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M02*
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11555
Schematics/Interface-Module V1/gbr/Processor_Board-F_Cu.gbr
Normal file
11555
Schematics/Interface-Module V1/gbr/Processor_Board-F_Cu.gbr
Normal file
File diff suppressed because it is too large
Load Diff
309
Schematics/Interface-Module V1/gbr/Processor_Board-F_Mask.gbr
Normal file
309
Schematics/Interface-Module V1/gbr/Processor_Board-F_Mask.gbr
Normal file
@@ -0,0 +1,309 @@
|
||||
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|
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||||
G04 Created by KiCad (PCBNEW (6.0.4)) date 2023-02-09 14:30:41*
|
||||
%MOMM*%
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||||
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||||
G01*
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||||
G04 APERTURE LIST*
|
||||
G04 Aperture macros list*
|
||||
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|
||||
0 Rectangle with rounded corners*
|
||||
0 $1 Rounding radius*
|
||||
0 $2 $3 $4 $5 $6 $7 $8 $9 X,Y pos of 4 corners*
|
||||
0 Add a 4 corners polygon primitive as box body*
|
||||
4,1,4,$2,$3,$4,$5,$6,$7,$8,$9,$2,$3,0*
|
||||
0 Add four circle primitives for the rounded corners*
|
||||
1,1,$1+$1,$2,$3*
|
||||
1,1,$1+$1,$4,$5*
|
||||
1,1,$1+$1,$6,$7*
|
||||
1,1,$1+$1,$8,$9*
|
||||
0 Add four rect primitives between the rounded corners*
|
||||
20,1,$1+$1,$2,$3,$4,$5,0*
|
||||
20,1,$1+$1,$4,$5,$6,$7,0*
|
||||
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||||
}
|
||||
],
|
||||
"MaterialStackup": [
|
||||
{
|
||||
"Type": "Legend",
|
||||
"Name": "Top Silk Screen"
|
||||
},
|
||||
{
|
||||
"Type": "SolderPaste",
|
||||
"Name": "Top Solder Paste"
|
||||
},
|
||||
{
|
||||
"Type": "SolderMask",
|
||||
"Thickness": 0.01,
|
||||
"Name": "Top Solder Mask"
|
||||
},
|
||||
{
|
||||
"Type": "Copper",
|
||||
"Thickness": 0.035,
|
||||
"Name": "F.Cu"
|
||||
},
|
||||
{
|
||||
"Type": "Dielectric",
|
||||
"Thickness": 1.51,
|
||||
"Material": "FR4",
|
||||
"Name": "F.Cu/B.Cu",
|
||||
"Notes": "Type: dielectric layer 1 (from F.Cu to B.Cu)"
|
||||
},
|
||||
{
|
||||
"Type": "Copper",
|
||||
"Thickness": 0.035,
|
||||
"Name": "B.Cu"
|
||||
},
|
||||
{
|
||||
"Type": "SolderMask",
|
||||
"Thickness": 0.01,
|
||||
"Name": "Bottom Solder Mask"
|
||||
},
|
||||
{
|
||||
"Type": "SolderPaste",
|
||||
"Name": "Bottom Solder Paste"
|
||||
},
|
||||
{
|
||||
"Type": "Legend",
|
||||
"Name": "Bottom Silk Screen"
|
||||
}
|
||||
]
|
||||
}
|
||||
BIN
Schematics/Interface-Module V1/gbr/gbr.zip
Normal file
BIN
Schematics/Interface-Module V1/gbr/gbr.zip
Normal file
Binary file not shown.
Reference in New Issue
Block a user